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Hybrid Parallel Programming Using Locks and STM

Ryan Saptarshi Ray1 , Parama Bhaumik2 , Utpal Kumar Ray3

  1. Dept. of Information Technology, Jadavpur University, Kolkata, India.
  2. Dept. of Information Technology, Jadavpur University, Kolkata, India.
  3. Dept. of Information Technology, Jadavpur University, Kolkata, India.

Correspondence should be addressed to: ryan.ray@rediffmail.com.

Section:Research Paper, Product Type: Journal Paper
Volume-5 , Issue-10 , Page no. 185-192, Oct-2017

CrossRef-DOI:   https://doi.org/10.26438/ijcse/v5i10.185192

Online published on Oct 30, 2017

Copyright © Ryan Saptarshi Ray, Parama Bhaumik, Utpal Kumar Ray . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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How to Cite this Paper

IEEE Style Citation: Ryan Saptarshi Ray, Parama Bhaumik, Utpal Kumar Ray , “Hybrid Parallel Programming Using Locks and STM,” International Journal of Computer Sciences and Engineering, Vol.5, Issue.10, pp.185-192, 2017.

MLA Style Citation: Ryan Saptarshi Ray, Parama Bhaumik, Utpal Kumar Ray "Hybrid Parallel Programming Using Locks and STM." International Journal of Computer Sciences and Engineering 5.10 (2017): 185-192.

APA Style Citation: Ryan Saptarshi Ray, Parama Bhaumik, Utpal Kumar Ray , (2017). Hybrid Parallel Programming Using Locks and STM. International Journal of Computer Sciences and Engineering, 5(10), 185-192.

BibTex Style Citation:
@article{Ray_2017,
author = {Ryan Saptarshi Ray, Parama Bhaumik, Utpal Kumar Ray },
title = {Hybrid Parallel Programming Using Locks and STM},
journal = {International Journal of Computer Sciences and Engineering},
issue_date = {10 2017},
volume = {5},
Issue = {10},
month = {10},
year = {2017},
issn = {2347-2693},
pages = {185-192},
url = {https://www.ijcseonline.org/full_paper_view.php?paper_id=1496},
doi = {https://doi.org/10.26438/ijcse/v5i10.185192}
publisher = {IJCSE, Indore, INDIA},
}

RIS Style Citation:
TY - JOUR
DO = {https://doi.org/10.26438/ijcse/v5i10.185192}
UR - https://www.ijcseonline.org/full_paper_view.php?paper_id=1496
TI - Hybrid Parallel Programming Using Locks and STM
T2 - International Journal of Computer Sciences and Engineering
AU - Ryan Saptarshi Ray, Parama Bhaumik, Utpal Kumar Ray
PY - 2017
DA - 2017/10/30
PB - IJCSE, Indore, INDIA
SP - 185-192
IS - 10
VL - 5
SN - 2347-2693
ER -

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Abstract

Software Transactional Memory (STM) is a new alternative approach to locks which solves the problem of synchronization in parallel programs. In STM users have to identify the critical sections in the program and enclose them within transactions by using appropriate STM function calls. Then STM automatically by its internal constructs ensures synchronization in the program. This paper shows how to solve the problem of synchronization in parallel programs by using a hybrid programming approach using both locks and STM. Locks use pessimistic approach to solve the problem of synchronization in parallel programs. STM uses optimistic approach to solve the problem of synchronization in parallel programs. Both the optimistic and pessimistic approaches have some advantages and disadvantages. The disadvantage of optimistic approach is that transactions are aborted when validation cannot be done. This approach works well when there are no conflicts (hence the term optimistic) but wastes work when there are conflicts. Aborting of transactions is a severe problem when the transactions are long and interactive. The disadvantage of pessimistic approach is that large number of locks in the program will lead to very slow execution speed which may cancel out the gains made by solving the problem in parallel. The hybrid approach combines the advantages of the optimistic and pessimistic approaches removing their disadvantages without any degradation of performance.

Key-Words / Index Term

Multiprocessing, Parallel Processing, Locks, Software Transactional Memory, Hybrid Parallel Programming

References

[1] Ryan Saptarshi Ray,“STM:Lock-Free Synchronization”, Special Issue of IJCCT, ISSN (ONLINE): 2231 – 0371, ISSN (PRINT): 0975 – 7449, Volume- 3, Issue-2, pp. 19-25, February 2012
[2] Ryan Saptarshi Ray and Utpal Kumar Ray, “Writing Lock-Free Code”, In the Proceedings of International Conference on Computer Science and Engineering(ICCSE),Kolkata, pp. 19-25, 24th March 2012
[3] Pascal Felber, Christof Fetzer, Torvald Riegel, “Dynamic Performance Tuning of Word-Based Software Transactional Memory” In the Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming, pp. 237-246 ,2008
[4] Philip S.Yu, Daniel M. Dias, “Analysis of Hybrid Concurrency Control Schemes For a High Data Contention Environment”, IEEE TRANSACTIONS ON SOFTWARE ENGINEERING,Volume-18, Issue-2, pp. 118-129, 1992
[5] Sang H. Son, Junhyoung Lee, “A New Approach to Real-Time Transaction Scheduling”, In the Proceedings of the Fourth Euromicro workshop on Real-Time Systems, pp. 177-182, June 1992
[6] Sung Ho Cho, JongMin Lee, Chong-sun Hwang, WonGyu Lee, “Hybrid Concurrency Control for Mobile Computing” In the Proceedings of High Performance Computing on the Information Superhighway, pp. 478-483, April 1997
[7] SungHo Cho, “A Hybrid Concurrency Control with Deadlock-free Approach”, In the Proceedings of the International Conference on Computational Science and Its Applications, pp. 517-524, 2003
[8] Jan Lindstrom, “Hybrid Concurrency Control Method in Firm Real-Time Databases”
[9] Debendranath Das, Ryan Saptarshi Ray, Utpal Kumar Ray, “Implementation and Consistency Issues in Distributed Shared Memory”, International Journal of Computer Sciences and Engineering (IJCSE) E-ISSN:2347-2693 Volume- 4, Issue-12, pp 125-131, 2016