Open Access   Article Go Back

Stack improving optimization feed with multi core task display interface

Sumalatha Aradhya1 , N.K. Srinath2

Section:Research Paper, Product Type: Journal Paper
Volume-6 , Issue-6 , Page no. 1344-1349, Jun-2018

CrossRef-DOI:   https://doi.org/10.26438/ijcse/v6i6.13441349

Online published on Jun 30, 2018

Copyright © Sumalatha Aradhya, N.K. Srinath . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

View this paper at   Google Scholar | DPI Digital Library

How to Cite this Paper

  • IEEE Citation
  • MLA Citation
  • APA Citation
  • BibTex Citation
  • RIS Citation

IEEE Style Citation: Sumalatha Aradhya, N.K. Srinath, “Stack improving optimization feed with multi core task display interface,” International Journal of Computer Sciences and Engineering, Vol.6, Issue.6, pp.1344-1349, 2018.

MLA Style Citation: Sumalatha Aradhya, N.K. Srinath "Stack improving optimization feed with multi core task display interface." International Journal of Computer Sciences and Engineering 6.6 (2018): 1344-1349.

APA Style Citation: Sumalatha Aradhya, N.K. Srinath, (2018). Stack improving optimization feed with multi core task display interface. International Journal of Computer Sciences and Engineering, 6(6), 1344-1349.

BibTex Style Citation:
@article{Aradhya_2018,
author = {Sumalatha Aradhya, N.K. Srinath},
title = {Stack improving optimization feed with multi core task display interface},
journal = {International Journal of Computer Sciences and Engineering},
issue_date = {6 2018},
volume = {6},
Issue = {6},
month = {6},
year = {2018},
issn = {2347-2693},
pages = {1344-1349},
url = {https://www.ijcseonline.org/full_paper_view.php?paper_id=2350},
doi = {https://doi.org/10.26438/ijcse/v6i6.13441349}
publisher = {IJCSE, Indore, INDIA},
}

RIS Style Citation:
TY - JOUR
DO = {https://doi.org/10.26438/ijcse/v6i6.13441349}
UR - https://www.ijcseonline.org/full_paper_view.php?paper_id=2350
TI - Stack improving optimization feed with multi core task display interface
T2 - International Journal of Computer Sciences and Engineering
AU - Sumalatha Aradhya, N.K. Srinath
PY - 2018
DA - 2018/06/30
PB - IJCSE, Indore, INDIA
SP - 1344-1349
IS - 6
VL - 6
SN - 2347-2693
ER -

VIEWS PDF XML
509 255 downloads 251 downloads
  
  
           

Abstract

The real time embedded software development requires expertise for developing critical software. The safety critical embedded development has major concerns as the final target code should execute with less size and more speed. The increased stack size and reduced execution speed lowers the performance of embedded software. In the paper, a method to overcome the rapid growth of the stack is proposed and multicore load balancing issues are addressed. The model for stack improving optimization feed and multi core task balancing display interface is derived in the paper. A unique approach with the method of providing optimization hints during the development phase through interactive display interface is suggested in the paper. The experiment is conducted by considering a concave set of functions with a task dependency derivation cost. The best execution result being obtained by using stack, improving optimization feed interface.

Key-Words / Index Term

Embedded software, interactive, display interface, multicore task balancing, parallelism, programmer, optimization, task dependency

References

[1] Bahl, A. K.; Baltzer, O.; Rau-Chaplin, A.; and Varghese, B. (2012). Parallel Simulations for Analysing Portfolios of Catastrophic Event Risk. Workshop Proceedings of the International Conference of High Performance Computing, Networking, Storage and Analysis (SC12).
[2] Eigenmann, Rudol.; Hoeflinger, Jay.; and Padua, David, (1998). On the Automatic Parallelization of the Perfect Benchmarks. IEEE Transactions on Parallel and Distributed Systems, volume 9, number 1, January 1998, pages 5-23.
[3] Hall, Mary; Padua, David.; and Pingali, Keshav. (2009). Compiler Research: The Next 50 Years, FEBRUARY 2009 VOL. 52, COMMUNICATIONS OF THE ACM, pp. 60-67,
[4] Pennycook, S.J.; Hughes, C.J..; Smelyanskiy, M.; and A, S. (2013). Exploring SIMD for Molecular Dynamics Using Intel R Xeon Processors and Intel R Xeon PhiTMCoprocessors , Parallel Computing Lab, Intel Corporation, IEEE publication, 2013
[5] Contreas, G., and Martonosi, M. (2008) Characterizing and improving the performance of Intel threading building blocks. In 4th International Symposium on Workload Characterization (IISWC 2008), Seattle, Washington, USA, September 14- 16, 2008 (2008), pp. 57–66
[6] DeVito, Zachary.; Hegarty, James.; Aiken, Alex.; Hanrahan, Pat.; and Vitek, Jan. (2013). Terra: A Multi-Stage Language for High Performance Computing PLDI13 June 16-22, 2013, ACM
[7] Nethercote, Nicholas; Seward, Julian. (2007). "Valgrind: A Framework for Heavyweight Dynamic Binary Instrumentation". Proceedings of ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation (PLDI 2007).
[8] Graham, Susan L.; Kessler, Peter B.; and Mckusick, Marshall K.(1982). gprof: a Call Graph Execution Profiler, Proceedings of the SIGPLAN `82 Symposium on Compiler Construction, SIGPLAN Notices, Vol. 17, No 6, pp. 120-126
[9] Sapinderjit Kaur, Kirandeep. Kaur, Amit.Chhabra, Parallel Job Scheduling Using Grey Wolf Optimization Algorithm for Heterogeneous Multi-Cluster Environment, International Journal of Computer Sciences and Engineering (IJCSE), Volume 5, Issue 10, E-ISSN: 2347-2693, Oct 2017, pp 44-53.
[10] Vasiliu, Laura.; Pop, Florin.; Negru, Catalin.; and Mocanu, Mariana, (2017). A hybrid scheduler for many task computing in big data systems. Int. J. Appl. Math. Comput. Sci., 2017, Vol. 27, No. 2, m`, 385–399
[11] Chmaj, G.; Walkowiak, K.; Tarnawski, M.; and Kucharzak, M.(2012). Heuristic algorithms for optimization of task allocation and result distribution in peer-to-peer computing systems, International Journal of Applied Mathematics and Computer Science 22(3): 733–748,
[12] Ró˙zycki, R.; Waligóra, G.; and Weglarz, J.(2016). Scheduling preemptable jobs on identical processors under varying availability of an additional continuous resource, International Journal of Applied Mathematics and Computer Science 26(3): 693–706,
[13] Mathwork’s Simulink Tool R2017b (2017). Generate C and C++ code optimized for embedded systems, MathWorks.
[14] Fritzson, Peter.; Bachmann, Bernhard.; Moudgalya, Kannan,; Casella, Francesco.; Lie, Bernt.; Kofranek, Jiri,.; Haumer, Anton,.; Geusen, Christoph.Nytsch.; and Vanfretti, Luigi (2017). Introduction to Modelica with Examples in Modeling Technology, and Applications, Modelica Publication, 2017
[15] Frenkel, Jens.; Schubert, Christian.; Kunze, Günter.; Fritzson, Peter .; Sjölund , Martin.; and Pop, Adrian (2011).Towards a Benchmark Suite for Modelica Compilers: Large Models, 8th International Modelica Conference - Dresden, Germany - 20-22 March 2011, ISBN: 978-91-7393-096-3
[16] Seidewitz, Papyrus.Ed (2015). Tool Paper: Combining Alf and UML in Modeling Tools – An Example with Model Driven Solutions, A specification by CEA, LIST.
[17] Roy, Nilabja.; Dabholkar, Akshay.; Hamm, Nathan.; Dowdy, Larry.; and Schmidt, Douglas (2008). Modeling Software Contention Using Colored Petri Nets, MASCOTS 2008, Baltimore, MD, USA
[18] Amann, S.; Proksch, S.; and Nadi, S (2016). FeedBaG: An Interaction Tracker for Visual Studio, In Proceedings of the 24th International Conference on Program Comprehension Tool Track, 2016
[19] Vogel, Lars (2013). Eclipse IDE: Java programming, debugging, unit testing, task management and Git version control with Eclipse (3rd ed.). Leipzig: Vogella. ISBN 978-3943747041.
[20] Gonnet, Pedro.; Schallery, Matthieu.; Theunsyz, Tom.; and Chalk Aidan B. G. (2013). SWIFT - Fast algorithms for multi resolution SPH on multi core architectures, 8th international SPHERIC workshop Trondheim, Norway, June 4-6, 2013
[21] Rutar, Nick.; Almazan, Christian. B.; and Foster, Jeffrey.S (2004), "A Comparison of Bug Finding Tools for Java". ISSRE `04 Proceedings of the 15th International Symposium on Software Reliability Engineering, IEEE
[22] Saunders, Stephen; Fields, Duane K.; Belayev, Eugene (March 1, 2006), IntelliJ IDEA in Action (1st ed.), Manning, p. 450, ISBN 1-932394-44-3
[23] Neumann, Dean.; Kulkarni, Dileep.; Kunze, Aaron.; Rogers, Gerald.; Verplanke, Edwin. (August 2006). Intel Virtualization Technology in Embedded and Communications Infrastructure Applications, Intel Technology Journal of application of virtualization to embedded systems.
[24] Bodin, Francois.; Chamski, Zbigniew.; Eisenbeis, Christine.; Rohou, Erven.; and Seznec, Andre. (1997). Salto: GCDS, A Compiler Strategy for Trading Code Size Against Performance in Embedded Applications, systems Pro jet CAPS Publication internet ,1153 ,December 1997, from https://hal.archives-ouvertes.fr/inria-00073718/document
[25] Deepali Simaiya, Raj Kumar Paul, “Review of Various Performcae Evaluation Issues and Efficient Load Balancing for Cloud Computing” IJSRCSEIT, Mar-Apr;3(3) :pp. 943-951, 2018
[26] Abdullah, Loai.; and Shinshoni, Lian. (2016). Look Ahead Selective Sampling for Incomplete Data, International Journal of Applied Mathematics and Computer Science., 2016, Vol. 26, No. 4, 871–884
[27] Falco, I. De.; Laskowski, E.; Olejnik, R.; Scafuri1, U.; Tarantino, E.; Tudruj, M. (2013). Load Balancing in Distributed Applications Based on Extremal Optimization, Applications of Evolutionary Computation, Springer Verlag (Ed.) (2013) pp. 52-61
[28] Korte, Bernhard.; and Vygen, Jens.(2006). Bin-Packing, Combinatorial Optimization: Theory and Algorithms, Algorithms and Combinatorics 21, Springer, pp.426–441, ISBN 978-3-540-25684-7