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Design of Resolver-To-Digital Converter for Motor Control Applications

T.Venu Gopal Reddy1 , Chandra Mohan Reddy Sivappagari2

Section:Research Paper, Product Type: Journal Paper
Volume-6 , Issue-7 , Page no. 239-244, Jul-2018

CrossRef-DOI:   https://doi.org/10.26438/ijcse/v6i7.239244

Online published on Jul 31, 2018

Copyright © T.Venu Gopal Reddy, Chandra Mohan Reddy Sivappagari . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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IEEE Style Citation: T.Venu Gopal Reddy, Chandra Mohan Reddy Sivappagari, “Design of Resolver-To-Digital Converter for Motor Control Applications,” International Journal of Computer Sciences and Engineering, Vol.6, Issue.7, pp.239-244, 2018.

MLA Style Citation: T.Venu Gopal Reddy, Chandra Mohan Reddy Sivappagari "Design of Resolver-To-Digital Converter for Motor Control Applications." International Journal of Computer Sciences and Engineering 6.7 (2018): 239-244.

APA Style Citation: T.Venu Gopal Reddy, Chandra Mohan Reddy Sivappagari, (2018). Design of Resolver-To-Digital Converter for Motor Control Applications. International Journal of Computer Sciences and Engineering, 6(7), 239-244.

BibTex Style Citation:
@article{Reddy_2018,
author = {T.Venu Gopal Reddy, Chandra Mohan Reddy Sivappagari},
title = {Design of Resolver-To-Digital Converter for Motor Control Applications},
journal = {International Journal of Computer Sciences and Engineering},
issue_date = {7 2018},
volume = {6},
Issue = {7},
month = {7},
year = {2018},
issn = {2347-2693},
pages = {239-244},
url = {https://www.ijcseonline.org/full_paper_view.php?paper_id=2422},
doi = {https://doi.org/10.26438/ijcse/v6i7.239244}
publisher = {IJCSE, Indore, INDIA},
}

RIS Style Citation:
TY - JOUR
DO = {https://doi.org/10.26438/ijcse/v6i7.239244}
UR - https://www.ijcseonline.org/full_paper_view.php?paper_id=2422
TI - Design of Resolver-To-Digital Converter for Motor Control Applications
T2 - International Journal of Computer Sciences and Engineering
AU - T.Venu Gopal Reddy, Chandra Mohan Reddy Sivappagari
PY - 2018
DA - 2018/07/31
PB - IJCSE, Indore, INDIA
SP - 239-244
IS - 7
VL - 6
SN - 2347-2693
ER -

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Abstract

Prevalent Resolver to Digital Converter (RDC) is frequently adopted using DSP techniques to reduce the hardware tread and improve system accuracy. However, in such implementations, both resolver and ADC channel imbalance introduce significant errors, practically in speed output of the type-II track loop algorithm. This paper discusses the design of digital filters based on the interpolation of pre-design filters for a DSP based on type-II track loop algorithm with square wave excitation. Such filters are tenth order high pass filter and tenth order peak filter, the projected DSP based RDC system is executed in MATLAB/SIMULINK the simulation results demonstrate the decrease the peak-to-peck error estimation of speed out response of the system.

Key-Words / Index Term

Resolver, RDC, type-II tracking loop algorithm, ADC channels, Adaptive digital filter design

References

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