VLSI Cell Partitioning Using Data Mining Approaches
Suryakanta Nayak1 , Mrutyunjaya Panda2
Section:Research Paper, Product Type: Journal Paper
Volume-6 ,
Issue-8 , Page no. 1019-1027, Aug-2018
CrossRef-DOI: https://doi.org/10.26438/ijcse/v6i8.10191027
Online published on Aug 31, 2018
Copyright © Suryakanta Nayak, Mrutyunjaya Panda . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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IEEE Style Citation: Suryakanta Nayak, Mrutyunjaya Panda, “VLSI Cell Partitioning Using Data Mining Approaches,” International Journal of Computer Sciences and Engineering, Vol.6, Issue.8, pp.1019-1027, 2018.
MLA Style Citation: Suryakanta Nayak, Mrutyunjaya Panda "VLSI Cell Partitioning Using Data Mining Approaches." International Journal of Computer Sciences and Engineering 6.8 (2018): 1019-1027.
APA Style Citation: Suryakanta Nayak, Mrutyunjaya Panda, (2018). VLSI Cell Partitioning Using Data Mining Approaches. International Journal of Computer Sciences and Engineering, 6(8), 1019-1027.
BibTex Style Citation:
@article{Nayak_2018,
author = {Suryakanta Nayak, Mrutyunjaya Panda},
title = {VLSI Cell Partitioning Using Data Mining Approaches},
journal = {International Journal of Computer Sciences and Engineering},
issue_date = {8 2018},
volume = {6},
Issue = {8},
month = {8},
year = {2018},
issn = {2347-2693},
pages = {1019-1027},
url = {https://www.ijcseonline.org/full_paper_view.php?paper_id=2809},
doi = {https://doi.org/10.26438/ijcse/v6i8.10191027}
publisher = {IJCSE, Indore, INDIA},
}
RIS Style Citation:
TY - JOUR
DO = {https://doi.org/10.26438/ijcse/v6i8.10191027}
UR - https://www.ijcseonline.org/full_paper_view.php?paper_id=2809
TI - VLSI Cell Partitioning Using Data Mining Approaches
T2 - International Journal of Computer Sciences and Engineering
AU - Suryakanta Nayak, Mrutyunjaya Panda
PY - 2018
DA - 2018/08/31
PB - IJCSE, Indore, INDIA
SP - 1019-1027
IS - 8
VL - 6
SN - 2347-2693
ER -
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Abstract
Theoretical studies on various cell partitioning methods are lucidly presented in the current research pertaining to design and development of VLSI circuits. Owing to the difficulties in designing complex VLSI systems, it is extremely crucial to partition the large circuit into tiny logic blocks to reduce time complexity, space complexity and power consumption. To envisage the same, this communication scrutinizes a heuristic technique by using various data mining algorithms such as K-means algorithms, K-Nearest Neighbor (K-NN), Fuzzy c-means and Support Vector Machine (SVM) for resolution of complexity in VLSI circuits, where K-NN and SVM are employed for classification purpose and Fuzzy c-means and K-means methodologies are deployed for clustering purpose. The upshot of the research revealed that K-NN and Fuzzy c-means methods bestow optimum result pertaining to VLSI cell partitioning.
Key-Words / Index Term
K-means algorithms, K-nearest neighbor, Fuzzy c-means, The Support Vector Machines, Partitioning, and Data mining
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