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Design and Implementation of Adiabatic Sequential and Combinational circuits using Reversible Gate

Bhawna Yadav1 , Tarun Varma2

Section:Survey Paper, Product Type: Journal Paper
Volume-7 , Issue-10 , Page no. 251-255, Oct-2019

CrossRef-DOI:   https://doi.org/10.26438/ijcse/v7i10.251255

Online published on Oct 31, 2019

Copyright © Bhawna Yadav, Tarun Varma . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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IEEE Style Citation: Bhawna Yadav, Tarun Varma, “Design and Implementation of Adiabatic Sequential and Combinational circuits using Reversible Gate,” International Journal of Computer Sciences and Engineering, Vol.7, Issue.10, pp.251-255, 2019.

MLA Style Citation: Bhawna Yadav, Tarun Varma "Design and Implementation of Adiabatic Sequential and Combinational circuits using Reversible Gate." International Journal of Computer Sciences and Engineering 7.10 (2019): 251-255.

APA Style Citation: Bhawna Yadav, Tarun Varma, (2019). Design and Implementation of Adiabatic Sequential and Combinational circuits using Reversible Gate. International Journal of Computer Sciences and Engineering, 7(10), 251-255.

BibTex Style Citation:
@article{Yadav_2019,
author = {Bhawna Yadav, Tarun Varma},
title = {Design and Implementation of Adiabatic Sequential and Combinational circuits using Reversible Gate},
journal = {International Journal of Computer Sciences and Engineering},
issue_date = {10 2019},
volume = {7},
Issue = {10},
month = {10},
year = {2019},
issn = {2347-2693},
pages = {251-255},
url = {https://www.ijcseonline.org/full_paper_view.php?paper_id=4929},
doi = {https://doi.org/10.26438/ijcse/v7i10.251255}
publisher = {IJCSE, Indore, INDIA},
}

RIS Style Citation:
TY - JOUR
DO = {https://doi.org/10.26438/ijcse/v7i10.251255}
UR - https://www.ijcseonline.org/full_paper_view.php?paper_id=4929
TI - Design and Implementation of Adiabatic Sequential and Combinational circuits using Reversible Gate
T2 - International Journal of Computer Sciences and Engineering
AU - Bhawna Yadav, Tarun Varma
PY - 2019
DA - 2019/10/31
PB - IJCSE, Indore, INDIA
SP - 251-255
IS - 10
VL - 7
SN - 2347-2693
ER -

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Abstract

Programmable reversible logic circuit (RLC) is design style for nanotechnology and quantum computing with minimum heat generation, quantum cost and garbage output. Late advances in reversible rationale utilizing and quantum PC calculations consider enhanced PC engineering and math rationale unit plans. In this paper, we survey the N-bit reversible logic adder and sub tractors are used with minimal delay, and may be configured to produce a variety of logical calculations. The reversible N-bit adder/ sub tractor design is verified and its advantages over the only existing adder design are quantitatively analyzed

Key-Words / Index Term

Reversible Gates, 4-bit Adder/ Sub tractor, Garbage Output, Quantum Cost

References

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