This paper presents a novel approach to optimization using genetic algorithms (GAs) for the autonomous design of digital integrated circuits using CMOS technology. The genetic algorithm, implemented through a user-friendly Graphical User Interface (GUI) in MATLAB, optimizes transistor dimensions while considering the trade-offs between power consumption, delay, and speed. By executing the GA program multiple times, optimal values for n-type and p-type MOSFET dimensions (Wn and Wp), layout area, power consumption, high-to-low propagation delay (Tplh), and low-to-high propagation delay (Tphl) are stored in a matrix. The algorithm then identifies the chromosome associated with the minimum power consumption and displays the corresponding values of Wp, Wn, Tplh, and Tphl in the GUI. Furthermore, the accuracy of the algorithm is confirmed through circuit simulation in HSPICE software, demonstrating close agreement between the simulated results and those obtained through the genetic algorithm in MATLAB. This comprehensive approach offers an effective solution for optimizing digital integrated circuits in CMOS technology.

Genetic Algorithm; Automatic Design; CMOS Digital Integrated Circuits; Full-Adder; VLSI

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